Three young researchers from Tokyo Institute of Technology have received the 2022 Suematsu Digital Technology Award, with an award ceremony held on September 1.
The Suematsu Digital Technology Award was established in 2018 to provide broad support to young researchers and their work in areas such as computing, robotics, networking and digital technology applications.
Present at the ceremony were: the three laureates, President Kazuya Masu, Executive Vice President of Research Osamu Watanabe, Professor Emeritus Yasuharu Suematsu, Chairman and Director of Gurunavi Inc. NEC Corp. National Agricultural and Food Research Institute Kazuo Kyuma President Hisao Taki Executive Advisor Endo Nobuhiro, Emeritus Professor Furuta Katsuhisa, Tokyo Tech Alumni Association (Kuramae Kougyoukai) Fumio Motobo, Executive Assistant to the President.
2022 Late Pine Prize Winners of “Digital Technology Foundation and Development”
Research topic: Radio propagation analysis of millimeter wave to terahertz wave and development of underground imaging technology
As a non-invasive technology, radio waves have been widely studied for medical uses such as abnormal tissue detection and bioimaging. However, the frequencies used are mainly concentrated in a few GHz, which limits the resolution of the measurements. Recently, communication technologies of millimeter waves and terahertz waves have developed rapidly. At the same time, due to the short wavelength, it is expected to be used to achieve high-resolution imaging. In this study, millimeter and terahertz wave propagation inside the human body will be comprehensively analyzed, and emerging machine learning techniques will be used to figure out the relationship between internal structure and wave propagation properties. Then, algorithms will be developed to reconstruct subsurface structures with high accuracy. In the future, the research aims to develop fundamental techniques for high-resolution subsurface imaging for biomedical applications.
Research topic: Research on low-latency logic circuit based on optical likelihood calculation
Circuits made from complementary metal oxide semiconductors (CMOS) support today’s digital society. However, as circuits get smaller, processing delays increase, which is a major problem. To solve this problem, efforts have been made to introduce optical signal processing into the circuit. As circuits get smaller, this approach promises to improve processing latency, as processing is done as the optical signal propagates through the circuit. Based on this background, the author has been engaged in the research of optical likelihood calculation, and successfully realized its operation. This research applies computational techniques to logic circuits. In particular, the authors treat the circuit’s input-output relationship as a likelihood calculation. This will allow optics and electronics to share processing in a suitable way, and hopefully open the way for digital technologies that reduce latency.
Research topic: Ultra-low voltage design and device technology of WSe2 CMOSFETs for Energy Efficient Digital Electronics
Digital electronics based on silicon (Si) semiconductors are the foundation of modern society and will require further development in the future. However, the miniaturization of semiconductor devices, which is a guiding principle for performance improvement, has reached its essential limit. Once miniaturization is complete, performance will only increase by 3% per year. In addition, due to the rapid increase in information traffic, the significant increase in power consumption of semiconductor devices is a pressing issue on a global scale. Therefore, tungsten diselenide (WSe2), it has no dangling bonds, and its high mobility of electrons and holes surpasses that of Si even in the case of monolayer and bipolar conduction, attracting extensive attention as a semiconductor alternative to Si.The purpose of this study is to establish the device technology for WSe2 CMOSFETs and enable energy-efficient digital electronics at ultra-low voltage operation. By independently building alloy and compound metal source/drain techniques and self-aligned gate stacking techniques, a 15x gain of CMOS inverters at low voltage 0.5V operation will be demonstrated.
At the ceremony of awarding awards to the winners, the researchers introduced their research topics. This was followed by Q&A and words of encouragement from Professor Emeritus Professor Suematsu and other attendees.
About the Suematsu Award “Foundation and Development of Digital Technology”
Former President of Tokyo Institute of Technology and Emeritus Professor Yasunori Suematsu, who has contributed to the development of high-capacity, long-distance optical fiber communications through research at the Institute, especially pioneering research related to dynamic single-mode, received the Japan Prize in 2014 laser. He donated part of the prize money to Tokyo Institute of Technology, hoping to encourage young scientists and engineers to conduct research in different fields, develop new technological systems, and explore untapped areas of science in depth.
Suematsu hopes to create an upward trend of activity to reveal the future shape that is hidden now. The Tokyo Institute of Technology Foundation created the Suematsu Fund to promote research in line with Suematsu’s wishes. Hisao Taki, president and representative director of Gurunavi Inc., an alumnus of Tokyo Institute of Technology and a supporter of the Tokyo Institute of Technology Fund since its inception, has also donated a large additional sum to make the award possible.